Prospects for memristors with hysteretic memristance as so-far missing core hardware element for transfer-less data computing and storage

We like and need Information and Communication Technologies (ICTs) for data processing. This is measurable in the exponential growth of data processed by ICT, e.g., ICT for cryptocurrency mining and search engines. So far, the energy demand for computing technology has increased by a factor of 1.38 every 10 years due to the exponentially increasing use of ICT systems as computing devices. Energy consumption of ICT systems is expected to rise from 1500 TWh (8% of global electricity consumption) in 2010 to 5700 TWh (14% of global electricity consumption) in 2030 [A. S. G. Andrae, Eng. Appl. Sci. Lett. 3, 19–31 (2020)]. A large part of this energy is required for the continuous data transfer between separated memory and processor units, which constitute the main components of ICT computing devices in von Neumann architecture. This, at the same time, massively slows down the computing power of ICT systems in von-Neumann architecture. In addition, due to the increasing complexity of artificial intelligence (AI) compute algorithms, since 2010, the AI training compute time demand for computing technology has increased tenfold every year, for example, from 1 × 10−6 to 1 × 10+4 Petaflops/day in the period from 2010 to 2020 [J. Wang, see https://ark-invest.com/articles/analyst-research/ai-training/ for information about the cost to train an AI interference system (2020)]. It has been theoretically predicted that ICT systems in the neuromorphic computer architecture will circumvent all of this through the use of merged memory and processor units. However, the core hardware element for this has not yet been realized so far. In this work, we discuss the perspectives for non-volatile resistive switches with hysteretic memristance as the core hardware element for merged memory and processor units in neuromorphic computers.