Competence Center for Micro- and Nanotechnologies

Trap states of the semiconductor/gate dielectric interface give rise to a pronounced subthreshold behavior in field-effect transistors (FETs) diminishing and masking intrinsic properties of 2D materials. To reduce the well-known detrimental effect of SiO2 surface traps, this work spin-coated an ultrathin (≈5 nm) cyclic olefin copolymer (COC) layer onto the oxide and this hydrophobic layer acts as a surface passivator. The chemical resistance of COC allows to fabricate monolayer MoS2 FETs on SiO2 by standard cleanroom processes. This way, the interface trap density is lowered and stabilized almost fivefold, to around 5 × 1011 cm−2 eV−1, which enables low-voltage FETs even on 300 nm thick SiO2. In addition to this superior electrical performance, the photoresponsivity of the MoS2 devices on passivated oxide is also enhanced by four orders of magnitude compared to nonpassivated MoS2 FETs. Under these conditions, negative photoconductivity and a photoresponsivity of 3 × 107 A W−1 is observed which is a new highest value for MoS2. These findings indicate that the ultrathin COC passivation of the gate dielectric enables to probe exciting properties of the atomically thin 2D semiconductor, rather than interface trap dominated effects.