The Josephson comparator is one of the building blocks of superconductor electronics. It is used as a decision element in all analog and digital circuits. For fast high-bandwidth analog-to-digital converters as well as for digital circuits with reduced switching energy its high sensitivity is most important. Thermal noise limits its decision uncertainty. In this work we analyze the influence of the bias current on the gray zone of a Josephson comparator. Circuit simulations are compared against experimental data. The experimental analysis shows a characteristic dependence of the gray zone on the bias current. We can identify a clear minimum value. This point is related to a certain clock frequency. At low frequencies the simulated relationship between the gray zone and the bias current is in very good agreement with experimental results. The comparison confirmed the circuit model and enables to adjust the design to certain applications to realize the best trade-off between clock frequency and grey zone. The article describes the experimental validation procedure and a derived normalized dependency in detail.