The MemDPU project is part of the DFG Priority Programme MemrisTec (SPP 2262) and addresses the growing demand for energy- and area-efficient computing architectures capable of real-time analysis of large data volumes, for example in the context of the Internet of Things.

The project focuses on the development of a novel memristive computing unit, the so-called Domino Processing Unit (DPU), which combines computing and memory operations directly within a memristive memory matrix. This is based on a systematic investigation and comparison of various in-memory logic concepts for both analog and abruptly switching memristive devices. Binary logic approaches derived from the physical input and output quantities resistance and voltage (MIMO, MIVO, VIMO, VIVO) are considered alongside novel ternary logic concepts enabled by the multilevel characteristics of memristive devices.

Building on these studies, a DPU-based computing concept is developed that integrates different logic approaches within a single architecture. In addition, a synthesis tool is designed to generate optimized voltage sequences for the execution of general computing operations. The goal of the project is the experimental realization of a 4-bit demonstrator, complemented by simulation-based scaling of the concept to higher bit widths. The work relies on a close integration of experimental device development with theoretical modeling and simulation.

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